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Examples of calculations involving a PPU might include rigid body dynamics, soft body dynamics, collision detection, fluid dynamics, hair and clothing simulation, finite element analysis, and fracturing of objects.
The idea is that specialized processors offload time consuming tasks from a computer's CPU, much like how a GPU performs graphics operations in the main CPU's place. The term was coined by Ageia to describe its PhysX chip. Several other technologies in the CPU-GPU spectrum have some features in common with it, although Ageia's product was the only complete one designed, marketed, supported, and placed within a system exclusively as a PPU.
An early academic PPU research project named SPARTA (Simulation of Physics on A Real-Time Architecture) was carried out at Penn State and University of Georgia. This was a simple FPGA based PPU that was limited to two dimensions. This project was extended into a considerably more advanced ASIC-based system named HELLAS.
February 2006 saw the release of the first dedicated PPU PhysX from Ageia (later merged into nVidia). The unit is most effective in accelerating particle systems, with only a small performance improvement measured for rigid body physics. The Ageia PPU is documented in depth in their US patent application #20050075849. Nvidia/Ageia no longer produces PPUs and hardware acceleration for physics processing is now supported through some of their graphics processing units.
The first processor to be advertised as a PPU was called the PhysX chip, introduced by a fabless semiconductor company called AGEIA. Games wishing to take advantage of the PhysX PPU must use AGEIA's PhysX SDK, (formerly known as the NovodeX SDK).
It consists of a general purpose RISC core controlling an array of custom SIMD floating point VLIW processors working in local banked memories, with a switch-fabric to manage transfers between them. There is no cache-hierarchy as in a CPU or GPU.
In February 2008, after Nvidia bought Ageia Technologies and eventually cut off the ability to process PhysX on the AGEIA PPU and NVIDIA GPUs in systems with active ATi/AMD GPUs, it seemed that PhysX went 100% to Nvidia. But in March 2008, Nvidia announced that it will make PhysX an open standard for everyone, so the main graphic-processor manufacturers will have PhysX support in the next generation graphics cards. Nvidia announced that PhysX will also be available for some of their released graphics cards just by downloading some new drivers.
See physics engine for a discussion of academic research PPU projects.
To compete with the PhysX PPU, an edition known as Havok FX was to take advantage of multi-GPU technology from ATI (CrossFire) and NVIDIA (SLI) using existing cards to accelerate certain physics calculations.
Havok divides the physics simulation into effect and gameplay physics, with effect physics being offloaded (if possible) to the GPU as Shader Model 3.0 instructions and gameplay physics being processed on the CPU as normal. The important distinction between the two is that effect physics do not affect gameplay (dust or small debris from an explosion, for example); the vast majority of physics operations are still performed in software. This approach differs significantly from the PhysX SDK, which moves all calculations to the PhysX card if it is present.
The drive toward GPGPU has made GPUs more suitable for the job of a PPU; DX10 added integer data types, unified shader architecture, and a geometry shader stage which allows a broader range of algorithms to be implemented; Modern GPUs support compute shaders, which run across an indexed space and don't require any graphical resources, just general purpose data buffers. NVidia CUDA provides a little more in the way of inter-thread communication and scratchpad-style workspace associated with the threads.
Nonetheless GPUs are built around a larger number of longer latency, slower threads, and designed around texture and framebuffer data paths, and poor branching performance; this distinguishes them from PPUs and the Cell as being less well optimized for taking over game world simulation tasks.
The Codeplay Sieve compiler supports the PPU, indicating that the Ageia physX chip would be suitable for GPGPU type tasks. However Ageia seem unlikely to pursue this market.
Like the Cell, Xeon Phi sits between the CPU and the GPU, in the spectrum between, general purpose processing versus specialized high-performance back-end processing. This uses caches rather than scratchpads, but still manages to achieve high throughput.
AMD have declared their long term intention to enable AMD APUs to use Radeon as a vector co-processor, sharing resources such as cache hierarchy. This future configuration started materializing in the form of Heterogeneous System Architecture.
Although very different from the PhysX, one could argue the PlayStation 2's VU0 is an early, limited implementation of a PPU. Conversely, one could describe a PPU to a PS2 programmer as an evolved replacement for VU0. Its feature-set and placement within the system is geared toward accelerating game update tasks including physics and AI; it can offload such calculations working off its own instruction stream whilst the CPU is operating on something else. Being a DSP however, it is much more dependent on the CPU to do useful work in a game engine, and would not be capable of implementing a full physics API, so it cannot be classed as a PPU. Also VU0 is capable of providing additional vertex processing power, though this is more a property of the pathways in the system rather than the unit itself.
This usage is similar to Havok FX or GPU physics in that an auxiliary unit's general purpose floating point power is used to complement the CPU in either graphics or physics roles.